发明名称 Method of operating a synchronous memory device
摘要 A synchronous memory device having a plurality of memory cells and a method of operation thereof. The memory device comprising: receiver circuitry to receive a first external clock signal; and output driver circuitry, to output data after a preprogrammed number of clock cycles of the first external clock signal transpire. The data is output synchronously with respect to the first external clock signal. The method of operation comprises: receiving a request for a read operation; sensing data in a portion of the plurality of sense amplifiers in response to the request for a read operation; and outputting the data after a preprogrammed delay time transpires. The method may further include receiving an external clock signal wherein the preprogrammed time delay is representative of a fixed number of clock cycles of the external clock signal. The data is output synchronously with respect to the first external clock signal.
申请公布号 US6101152(A) 申请公布日期 2000.08.08
申请号 US19980213243 申请日期 1998.12.17
申请人 RAMBUS INC. 发明人 FARMWALD, MICHAEL;HOROWITZ, MARK
分类号 G06F1/10;G06F11/00;G06F11/10;G06F12/00;G06F12/02;G06F12/06;G06F13/16;G06F13/376;G11C5/00;G11C5/06;G11C7/10;G11C7/22;G11C8/00;G11C11/401;G11C11/407;G11C11/4076;G11C11/409;G11C11/4096;G11C29/00;(IPC1-7):G11C7/00 主分类号 G06F1/10
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